说明

• XRT86L38EVAL, Evaluation System is an application board is setup as a common test circuit. The XRT86L38EVAL uses an FPGA designed to control the Framer/LIU and support communication between the PCI bridge and the XRT86L38. The FPGA chosen contains enough I/O pins to support all eight channels with one configuration. By default, the FPGA is configured into an FPGA loopback mode, whereby the output pins from the Framer block are internally looped back to the input pins. This allows standard network equipment connected to the physical interface to monitor data integrity through a complete communication path