Aptina HiSPi 至并行传感器桥参考设计。为了支持更高带宽的传感器,Aptina Imaging 推出了一种称为 HiSPi 的高速
串行接口。 HiSPi 接口可以运行一到四个串行数据通道,以及一个时钟通道。每个信号都是差分信号,运行速度高达 700 Mbps。为了通过传统并行
总线连接到 ISP,莱迪思创建了一个从 HiSPi 到并行格式的桥接器。 LatticeXP2-5 或 LatticeMachXO2-1200 非易失性 FPGA 为 HiSPi 到并行桥接提供高效且经济高效的解决方案
说明
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Aptina HiSPi to Parallel Sensor Bridge Reference Design. To support higher bandwidth sensors, Aptina Imaging has introduced a high-speed serial interface called HiSPi. The HiSPi interface can operate from one to four lanes of serial data, plus one clock lane. Each signal is differential and can run at speeds up to 700 Mbps. To interface to an ISP with a traditional parallel bus, Lattice has created a bridge from HiSPi to a parallel format. The LatticeXP2-5 or LatticeMachXO2-1200 non-volatile FPGA provides an efficient and cost-effective solution for HiSPi-to-parallel bridging