由于s3c2410与s3c2440的NandFlash控制器不一样,因此s3c2440_nand.c文件并不能直接应用,需要进行适当的修改,而主要修改的内容就是s3c2440的相关寄存器。
首先重新定义要用到的寄存器,把原文中第27行至第37行之间的宏定义去掉,改为下面的形式:
#define S3C2440_NFCONT_SECCL (1<<6)
#define S3C2440_NFCONT_MECCL (1<<5)
#define S3C2440_NFCONT_INITECC (1<<4)
#define S3C2440_NFCONT_nCE (1<<1)
#define S3C2440_NFCONT_MODE (1<<0)
#define S3C2440_NFCONF_TACLS(x) ((x)<<12)
#define S3C2440_NFCONF_TWRPH0(x) ((x)<<8)
#define S3C2440_NFCONF_TWRPH1(x) ((x)<<4)
#define S3C2440_ADDR_NALE 0x08
#define S3C2440_ADDR_NCLE 0x0C
然后就是修改s3c2440_hwcontrol函数和board_nand_init函数,其他函数不变。
board_nand_init函数主要是用于对NandFlash的初始化,对它修改的内容是对寄存器NFCONF和寄存器NFCONT的修改,如下所示为修改后的board_nand_init函数,其中红色标注的地方为修改的地方:
int board_nand_init(struct nand_chip *nand)
{
u_int32_t cfg;
u_int8_t tacls, twrph0, twrph1;
struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
struct s3c2440_nand *nand_reg = s3c2440_get_base_nand();
debugX(1,'board_nand_init()n');
writel(readl(&clk_power->clkcon) |(1 << 4), &clk_power->clkcon);
/* initialize hardware */
#ifdefined(CONFIG_S3C24XX_CUSTOM_NAND_TIMING)
tacls = CONFIG_S3C24XX_TACLS;
twrph0 = CONFIG_S3C24XX_TWRPH0;
twrph1 = CONFIG_S3C24XX_TWRPH1;
#else
tacls = 2;
twrph0 = 3;
twrph1 = 1;
#endif
cfg = S3C2440_NFCONF_TACLS(tacls - 1);
cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - 1);
cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - 1);
writel(cfg,&nand_reg->nfconf);
cfg = S3C2440_NFCONT_SECCL;
cfg |= S3C2440_NFCONT_MECCL;
cfg |= S3C2440_NFCONT_MODE;
writel(cfg,&nand_reg->nfcont);
/* initialize nand_chip data structure */
nand->IO_ADDR_R = (void*)&nand_reg->nfdata;
nand->IO_ADDR_W = (void*)&nand_reg->nfdata;
nand->select_chip = NULL;
/* read_buf and write_buf are default */
/* read_byte and write_byte are default*/
#ifdefCONFIG_NAND_SPL
nand->read_buf = nand_read_buf;
#endif
/* hwcontrol always must be implemented*/
nand->cmd_ctrl = s3c2440_hwcontrol;
nand->dev_ready = s3c2440_dev_ready;
#ifdefCONFIG_S3C2440_NAND_HWECC
nand->ecc.hwctl = s3c2440_nand_enable_hwecc;
nand->ecc.calculate = s3c2440_nand_calculate_ecc;
nand->ecc.correct = s3c2440_nand_correct_data;
nand->ecc.mode = NAND_ECC_HW;
nand->ecc.size =CONFIG_SYS_NAND_ECCSIZE;
nand->ecc.bytes =CONFIG_SYS_NAND_ECCBYTES;
#else
nand->ecc.mode = NAND_ECC_SOFT;
#endif
#ifdef CONFIG_S3C2440_NAND_BBT
nand->options = NAND_USE_FLASH_BBT;
#else
nand->options = 0;
#endif
debugX(1, 'end ofnand_initn');
return 0;
}
最后修改s3c2440_hwcontrol函数,该函数是用于对NandFlash的写命令和写地址操作:
static void s3c2440_hwcontrol(structmtd_info *mtd, int cmd, unsigned int ctrl)
{
struct nand_chip *chip =mtd->priv;
struct s3c2440_nand *nand = s3c2440_get_base_nand();
debugX(1,'hwcontrol(): 0x%02x 0x%02xn', cmd, ctrl);
if (ctrl &NAND_CTRL_CHANGE) {
ulong IO_ADDR_W = (ulong)nand;
if (!(ctrl &NAND_CLE))
IO_ADDR_W|= S3C2440_ADDR_NCLE;
if (!(ctrl &NAND_ALE))
IO_ADDR_W|= S3C2440_ADDR_NALE;
if(cmd ==NAND_CMD_NONE)
IO_ADDR_W = &nand->nfdata;
chip->IO_ADDR_W= (void *)IO_ADDR_W;
if (ctrl &NAND_NCE)
writel(readl(&nand->nfconf)& ~S3C2440_NFCONT_nCE,
&nand->nfconf);
else
writel(readl(&nand->nfconf)| S3C2440_NFCONT_nCE,
&nand->nfconf);
}
if (cmd !=NAND_CMD_NONE)
writeb(cmd, chip->IO_ADDR_W);
}
在这个函数中,除了修改寄存器的值以及设置写命令和写地址的IO端口外,我们还增加了if(cmd == NAND_CMD_NONE)判断语句。如果不加这个判断语句,向NandFlash内写数据是写不进去的,尽管系统不会提示任何错误,并显示“OK”,但其实数据是没有被写入的,因此一定要加上这条语句。这是因为在写完命令和地址后,一定还要把IO端口的地址重新设置为寄存器NFDATA。
需要说明的是,由于系统没有定义CONFIG_S3C2410_NAND_HWECC,因此我们暂时先不对s3c2440_nand_enable_hwecc函数、s3c2440_nand_calculate_ecc函数和s3c2440_nand_correct_data函数进行修改。
我们把编译好的u-boot.bin文件烧写到norflash中,利用NandFlash的相关命令进行验证:
U-Boot2011.06 (Aug 10 2011 - 23:16:25)
DRAM: 64 MiB
Flash: 2MiB
NAND: 256 MiB
***Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: CS8900-0
ZHAOCJ2440# nand info
Device 0:nand0, sector size 128 KiB
ZHAOCJ2440# nand device 0
ZHAOCJ2440# nand erase 0x100000 0x300000
NANDerase: device 0 offset 0x100000, size 0x300000
Erasingat 0x3e0000 -- 100% complete.
OK
ZHAOCJ2440# nand write 0 0x100000 0x300000
NANDwrite: device 0 offset 0x100000, size 0x300000
3145728 bytes written: OK
ZHAOCJ2440# nand read 0x30004000 0x100000 0x300000
NANDread: device 0 offset 0x100000, size 0x300000
3145728 bytes read: OK
ZHAOCJ2440# md.b 0
00000000:13 00 00 ea 14 f0 9f e5 14 f0 9fe5 14 f0 9f e5 ................
00000010:14 f0 9f e5 14 f0 9fe5 14 f0 9f e5 14 f0 9fe5 ................
00000020:e0 01 00 00 40 02 00 00 a0 0200 00 00 03 00 00 ....@...........
00000030:60 03 00 00 c0 03 00 00 20 04 0000 ef be ad de `....... .......
ZHAOCJ2440# md.b 0x30004000
30004000:13 00 00 ea 14 f0 9f e5 14 f0 9fe5 14 f0 9f e5 ................
30004010:14 f0 9f e5 14 f0 9fe5 14 f0 9f e5 14 f0 9fe5 ................
30004020:e0 01 00 00 40 02 00 00 a0 0200 00 00 03 00 00 ....@...........
30004030:60 03 00 00 c0 03 00 00 20 04 0000 ef be ad de `....... .......
上电以后NAND显示为256MiB,说明系统能够正确识别出NandFlash。然后我们把SDRAM中的数据写入到NandFlash中,再读取NandFlash中的这段数据,通过与原SDRAM的数据做比较,可以看出这两段数据的内容是一致的,因此我们能够断定移植的u-boot可以对NandFlash进行正确的读和写操作。
另外,如果你想更详细地了解开发板上NandFlash的情况,可以把drivers/mtd/nand/nand_base.c文件中第2676行中的MTDDEBUG改为printf,再把该行的MTD_DEBUG_LEVEL0,去掉,则在上电后,会显示如下内容:
U-Boot2011.06 (Aug 10 2011 - 23:55:48)
DRAM: 64 MiB
Flash: 2MiB
NAND: NAND device: ManufacturerID: 0xec, Chip ID: 0xda (Samsung NAND 256MiB 3,3V 8-bit)
256 MiB
***Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: CS8900-0
上一篇:u-boot-2011.06在基于s3c2440开发板的移植之编译配置
下一篇:u-boot-2011.06在基于s3c2440开发板的移植之引导内核与加载根文件系统
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