2018年10月16日 | stm32TIM输出通道配置详解

1、使能TIM时钟
   RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM*,ENABLE);
2、基础设置
   TIM_TimeBaseStructure.TIM_Period                                                 计数值  
   TIM_TimeBaseStructure.TIM_Prescaler                                              预分频,此值+1为分频的除数
   TIM_TimeBaseStructure.TIM_ClockDivision      =   0                               时钟因子 待做进一步说明
   TIM_TimeBaseStructure.TIM_RepetitionCounter =   0                               待做进一步说明
   TIM_TimeBaseStructure.TIM_CounterMode        =   TIM_CounterMode_Up              向上计数
                                                    TIM_CounterMode_Dowm            向下计数
                                                    TIM_CounterMode_CenterAligned1 中心对齐方式1
                                                    TIM_CounterMode_CenterAligned2 中心对齐方式2
                                                    TIM_CounterMode_CenterAligned3 中心对齐方式3
TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);
输出比较 & PWM通道
TIM_OCInitStructure.TIM_OCMode =           TIM_OCMode_Timing        输出比较时间模式    (输出引脚冻结无效)
                                           TIM_OCMode_Active        输出比较主动模式    (匹配时设置输出引脚为有效电平，当计数值为比较/捕获寄存器值相同时，强制输出为高电平)                                               
                                           TIM_OCMode_Inactive;     输出比较非主动模式 (匹配时设置输出引脚为无效电平，当计数值为比较/捕获寄存器值相同时，强制输出为低电平)     
                                           TIM_OCMode_Toggle        输出比较触发模式    (翻转。当计数值与比较/捕获寄存器值相同时，翻转输出引脚的电平)
                                           TIM_OCMode_PWM1          向上计数时，当TIMx_CNT < TIMx_CCR*时，输出电平有效，否则为无效
                                                                    向下计数时，当TIMx_CNT > TIMx_CCR*时，输出电平无效，否则为有效
                                           TIM_OCMode_PWM2        与PWM1模式相反
                                          
TIM_OCInitStructure.TIM_OutputState     =   TIM_OutputState_Disable      禁止OC*输出
                                            TIM_OutputState_Enable       开启OC*输出到对应引脚
TIM_OCInitStructure.TIM_OutputNState    =   TIM_OutputNState_Disable     互补输出使能。关闭OC*N输出
                                            TIM_OutputNState_Enable      互补输出使能。开启OC*N输出到对应的引脚                          
TIM_OCInitStructure.TIM_Pulse                                            比较/PWM 通道的值
TIM_OCInitStructure.TIM_OCPolarity      =   TIM_OCPolarity_High;         极性为正
                                            TIM_OCPolarity_Low           极必为负
TIM_OCInitStructure.TIM_OCNPolarity     =   TIM_OCNPolarity_High;        极性为正
                                            TIM_OCNPolarity_Low          极必为负
TIM_OCInitStructure.TIM_OCIdleState     =   TIM_OCIdleState_Set          当MOE=0时，如果实现了OC*N，则死区后OC*=1
                                            TIM_OCIdleState_Reset        当MOE=0时，如果实现了OC*N，则死区后OC*=0
TIM_OCInitStructure.TIM_OCNIdleState    =   TIM_OCIdleNState_Set         当MOE=0时，死区后OC*N=1
                                            TIM_OCIdleNState_Reset       当MOE=0时，死区后OC*N=0
TIM_OC1Init(TIM2, &TIM_OCInitStructure);
TIM_OC1PreloadConfig(TIM2, TIM_OCPreload_Disable);                      禁止OC1重装载,即TIM*_CCR*的数一经写入立即生效，否则要在下一个更新事件到来后才被装入寄存器

TIM_CtrlPWMOutputs(TIM1,ENABLE);                                         如果使用PWM模式，则此句一定不能省
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输入捕获通道
TIM_ICInitStructure.TIM_Channel         =   TIM_Channel_1
                                            TIM_Channel_2
                                            TIM_Channel_3
                                            TIM_Channel_4
TIM_ICInitStructure.TIM_ICPolarity      =   TIM_ICPolarity_Rising               输入/捕获上升沿有效
                                            TIM_ICPolarity_Falling              输入/捕获下降沿有效
TIM_ICInitStructure.TIM_ICSelection     =   TIM_ICSelection_DirectTI            IC*输入引脚选择，针对IC1/IC2有不同的定义
                                            TIM_ICSelection_IndirectTI
                                            TIM_ICSelection_TRC
TIM_ICInitStructure.TIM_ICPrescaler     =   TIM_ICPSC_DIV1                      输入模式下，捕获端口上的每一次边沿都触发一次捕获
                                            TIM_ICPSC_DIV2                      输入模式下，每2次事件触发一次捕获
                                            TIM_ICPSC_DIV4                      输入模式下，每4次事件触发一次捕获
                                            TIM_ICPSC_DIV8                      输入模式下，每8次事件触发一次捕获
TIM_ICInitStructure.TIM_ICFilter        =                                       捕获采样频率，详见TIM*_CCMR->IC*F说明
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死区设置
TIM_BDTRInitStructure.TIM_OSSRState     =   TIM_OSSRState_Enable
                                            TIM_OSSRState_Disable
TIM_BDTRInitStructure.TIM_OSSRIState    =   TIM_OSSRIState_Enable
                                            TIM_OSSRIState_Disable
TIM_BDTRInitStructure.TIM_LOCKLevel     =   TIM_LOCKLevel_OFF
                                            TIM_LOCKLevel_1
                                            TIM_LOCKLevel_2
                                            TIM_LOCKLevel_3
TIM_BDTRInitStructure.TIM_DeadTime      =   这里调整死区大小0-0xff
TIM_BDTRInitStructure.TIM_Break         =   TIM_Break_Enable
                                            TIM_Break_Disable
TIM_BDTRInitStructure.TIM_BreakPolarity =   TIM_BreakPolarity_Low
                                            TIM_BreakPolarity_High
TIM_BDTRInitStructure.TIM_AutomaticOutput=  TIM_AutomaticOutput_Enable
                                            TIM_AutomaticOutPut_Disable
4、配置中断
5、开启TIM
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例：
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_OCInitTypeDef TIM_OCInitStructure;
u16 CCR1_Val = 60000;
u16 CCR2_Val = 40000;
u16 CCR3_Val = 20000;
u16 CCR4_Val = 10000;

RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);

TIM_TimeBaseStructure.TIM_Period = 65535;    //计数值  
TIM_TimeBaseStructure.TIM_Prescaler = 7200-1;    //预分频,此值+1为分频的除数
TIM_TimeBaseStructure.TIM_ClockDivision = 0x0; //
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; //向上计数

TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);

TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Inactive;         //输出比较非主动模式
TIM_OCInitStructure.TIM_Pulse = CCR1_Val;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;   //极性为正
  
TIM_OC1Init(TIM2, &TIM_OCInitStructure);
TIM_OC1PreloadConfig(TIM2, TIM_OCPreload_Disable);     //禁止OC1重装载,其实可以省掉这句,因为默认是4路都不重装的.

       
TIM_OCInitStructure.TIM_Pulse = CCR2_Val;

TIM_OC2Init(TIM2, &TIM_OCInitStructure);
TIM_OC2PreloadConfig(TIM2, TIM_OCPreload_Disable);

        
TIM_OCInitStructure.TIM_Pulse = CCR3_Val;

TIM_OC3Init(TIM2, &TIM_OCInitStructure);
TIM_OC3PreloadConfig(TIM2, TIM_OCPreload_Disable);

      
TIM_OCInitStructure.TIM_Pulse = CCR4_Val;

TIM_OC4Init(TIM2, &TIM_OCInitStructure);
TIM_OC4PreloadConfig(TIM2, TIM_OCPreload_Disable);

TIM_ARRPreloadConfig(TIM2, ENABLE);

TIM_ClearITPendingBit(TIM2, TIM_IT_CC1 | TIM_IT_CC2 | TIM_IT_CC3 | TIM_IT_CC4|TIM_IT_Update);

TIM_ITConfig(TIM2, TIM_IT_CC1 | TIM_IT_CC2 | TIM_IT_CC3 | TIM_IT_CC4|TIM_IT_Update, ENABLE);

TIM_Cmd(TIM2, ENABLE);